Contributor: Thomas Uthupp Koshy
ABSTRACT
Configurable processors first appeared in the late 1990s with the promise that they would change the design and development of systems-on-chip (SoCs). The fundamental premise was a methodology that would relieve developers from being forced to design processors with features they didn’t need, and make it easier for them to add the features they wanted, without the prohibitive cost and lengthy development time required by fixed processor architectures. Instead, they could design the exact processor dictated by their system requirements with only the features and functions they chose. This would lead to a better product, better product differentiation and faster time-to-market.
A configurable processor core allows the system designer to custom tailor a microprocessor to more closely fit the intended application (or set of applications) on the SOC. A “closer fit” means that the processor’s register set is sized appropriately for the intended task and that the processor’s instructions also closely fit the intended task. For example, a processor tailored to efficiently execute digital audio applications may need a set of 24-bit registers for the audio data and a set of specialized instructions that operate on 24-bit audio data using a minimum number of clock cycles.
However, there were several issues to be resolved before this new approach was ready for use in large-scale SoC designs. These included design problems, development tools issues and the fact that systems built with configurable processors were difficult to verify. Over the last five years, these issues have been addressed, and the promise of configurability is being realized by developers with the design expertise and understanding of target application requirements needed to take on this new design approach. The methodology has clear benefits for designers in today’s environment of extreme competitive pressures—including performance increases and decreases in power consumption and area—as well as certain tradeoffs.
What is a Configurable Processor?
A configurable processor is one that can be modified or extended to address specific design issues by changing the processor’s feature set. Developers can add their product’s differentiating “secret sauce,” to perform a task much faster, in a much smaller area or with less power consumption. Speed, area and power optimizations can be traded off, as the designer chooses an optimal balance among these opposing factors. Other major benefits of configurable processors are flexibility, the absence of a fixed architectural framework and the use of HDL (hardware description languages) rather than proprietary languages.
Configurability and extendibility are two distinct benefits of configurable processors. Configurability lets the designer change the processor’s predefined architectural framework to meet design requirements. Examples of configurability include altering cache sizes or the number of registers in a register file, or deciding whether to include a multiplier or barrel shifter. Extendibility means that additions can be made to the processor.
There are several methodologies for finding the ideal mix of features in a configurable processor design. At one extreme is the point-and-click method, which is easy to use. At the other end are methods that require designers to learn new proprietary languages. The middle ground is a point-and-click method that also enables designers to use Verilog or VHDL (Very high speed integrated circuit Hardware Description Language) to specify extension logic, allowing the work to be done quickly and with conventional EDA (Electronic Design Automation) tools.
The point-and-click methodology fits nicely into existing EDA design flows. Unfortunately, such easy-to-use methodologies can be restrictive. It might seem that using a proprietary language would provide all the flexibility needed, but that’s not actually the case. Processors are designed with a fixed framework in place within which a proprietary language must remain. As a result, constraints are imposed on the designer, leaving some types of configurability impossible to accomplish.
However, with the middle-of-the-road approach, there’s no limit on what designers can do to the processor, such as changing the bus structure or the bus interfaces, or extending the architecture to perform special tasks never contemplated by the original processor architects. The architect of a configurable processor designed using this approach does not need to consider every possible way in which the core may be used. With a proprietary language, however, designers are constrained by the limits of the language and the surrounding framework as designed in advance by the architects.
Realizing the Promise
Typically, designing with a configurable processor is a straightforward process. Using the vendor’s default configurations, and some educated guesses about how that configuration should be modified, the designer generates the processor’s CAS (Cycle Accurate Simulator). An un-optimized version of the application is then simulated to determine whether it meets performance, area and power requirements. If not, the designer uses a profiling tool to determine cache misses, pipeline stalls and hot spots. The configuration is then changed or extension instructions are added, and the process is repeated.
This is an iterative and often creative process for finding the proper balance among speed, area and power. Fundamentally, this process generates empirical data used to make key architectural decisions. It is therefore useful to keep a spreadsheet of results so that, during iterations, one can determine the impacts of configuration decisions on speed, area and power.
Processor tailoring offers several benefits. Tailored instructions perform assigned tasks in fewer clock cycles. For real-time applications such as audio processing, the reduction in clock cycles directly lowers operating clock rates, which in turn cuts power dissipation. Lower power dissipation extends battery life for portable systems and reduces the system costs associated with cooling in all systems. Lower processor clock rates also allow the SOC to be fabricated in slower IC-fabrication technologies that are both less expensive and dissipate less static power.
The bottom line is that configurable processors will become increasingly important tools for designers and their companies to use in meeting the extreme competitive pressure that their new products will face in the marketplace. With all of their complexity, they can deliver astounding results. With proper training, their use can deliver a significantly differentiated product that cannot be matched using conventional methodologies. For designers who are in the game to win, configurable processors are well worth the effort.
REFERENCES
- www.rtcmagazine.com
- www.tensilica.com
- www.cera2.com
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